Search found 103 matches
- Mon Dec 25, 2023 1:28 pm
- Forum: Bug Reports
- Topic: SYSTEM.BIT Problem
- Replies: 1
- Views: 2644
SYSTEM.BIT Problem
Consider this code snippet REPEAT UNTIL SYSTEM.BIT(MCU.XOSC_STATUS, 31) and the corresponding assembly code: . 158 09EH 04808H ldr r0,[pc,#32] -> 192 . 160 0A0H 06801H ldr r1,[r0] . 162 0A2H 0D5FCH bpl.n -8 -> 158 . 192 <Const: 040024004H 040024004H> The procedure hangs at that point, unsurprisingly...
- Mon Dec 18, 2023 1:37 pm
- Forum: Astrobe for ARM Cortex-M0, M3, M4 and M7
- Topic: Buffer Address for DMA
- Replies: 3
- Views: 6427
Re: Buffer Address for DMA
Interesting. Yes, this works, again a) checking the code and b) running a test program. Surprising though. The Astrobe docs about module system say: ADR returns the absolute address of the given variable. Now, that SYSTEM.ADR of a VAR procedure parameter would return the actual address of the argume...
- Mon Dec 18, 2023 10:13 am
- Forum: Astrobe for ARM Cortex-M0, M3, M4 and M7
- Topic: Buffer Address for DMA
- Replies: 3
- Views: 6427
Buffer Address for DMA
To avoid busy-waiting at a serial output peripheral (USART), I am implementing buffered text output to a terminal. The intention is to use the DMA peripheral on the M0. Among other configuration, the DMA channel expects 1) a memory address of the buffer, and 2) the number of data items to transfer f...
- Mon Dec 11, 2023 11:44 pm
- Forum: Bug Reports
- Topic: Traps.GetName Misses Last Procedure
- Replies: 0
- Views: 4641
Traps.GetName Misses Last Procedure
I have been working on catching run-time errors in module bodies during the start-up of programs. To test, I have injected artificial errors, such as 'ASSERT(FALSE)', and the first obvious place was Main.Init, right at the end, after module Traps and the Terminal output have been initialised. Which ...
- Mon Dec 04, 2023 9:03 am
- Forum: Bug Reports
- Topic: Module Storage (1)
- Replies: 3
- Views: 2912
Re: Module Storage (1)
I suggest to replace the above quoted code with
Or remove it and amend 'Storage.StackAvailable()' accordingly, also removing VAR 'stackLimit' from the module.
Code: Select all
stackLimit := heapLimit;
- Sun Dec 03, 2023 5:03 am
- Forum: Bug Reports
- Topic: SYSTEM.ALIGN
- Replies: 2
- Views: 2503
Re: SYSTEM.ALIGN
Thanks for the fixes and updates with v9.0.3.
- Sun Dec 03, 2023 4:24 am
- Forum: Bug Reports
- Topic: Module Storage (2)
- Replies: 1
- Views: 2205
Module Storage (2)
The Astrobe docs say about module Storage: However, you must not change the interface definition of the module as the compiler expects it to be as shown above. I am a bit confused here. As per the documentation about module MAU, each 'NEW' call is converted into a call to MUA.New, and for 'DISPOSE' ...
- Sun Dec 03, 2023 4:19 am
- Forum: Bug Reports
- Topic: Module Storage (1)
- Replies: 3
- Views: 2912
Module Storage (1)
I need to write my own heap memory allocator, and I am studying module Storage, which of course is a good starting point. I have trouble understanding this part in the module initialisation: IF heapLimit = 0 THEN stackLimit := 0 ELSE (* Separate heap / stack *) stackLimit := 010000200H END; As far a...
- Mon Nov 27, 2023 1:49 pm
- Forum: Bug Reports
- Topic: SYSTEM.ALIGN
- Replies: 2
- Views: 2503
SYSTEM.ALIGN
I am having troubles using SYSTEM.ALIGN. My use case was this. Traps.mod contains several distinct exceptions handlers for the different MCU faults, such as Hard Fault, and some more for the M3, which are identical, mutatis mutandis the hard-coded fault number. Below is an attempt to use the same fa...
- Wed Nov 22, 2023 1:59 am
- Forum: Bug Reports
- Topic: Stack Trace Considerations (M0)
- Replies: 2
- Views: 2406
Re: Stack Trace Considerations (M0)
Thanks! That's exactly the flag to test to decide for either the +36 or the +40 offset, ie. solve the "gap" problem in 'SVCTrap'. My two "gap"-related test cases now show correct results with the corresponding changes in 'SVCTrap'. To be fair, the flag is described in the M0 programming manual (PM02...