Search found 102 matches
- Sat Apr 17, 2021 6:48 am
- Forum: Astrobe for FPGA RISC5
- Topic: Configurable Stack Size
- Replies: 0
- Views: 39265
Configurable Stack Size
As mentioned in here , my first real use of creating my own boot file was to make the stack size configurable. To tie up that loose end, here's how. It should basically apply to Project Oberon as well, but I'll focus on Embedded Oberon. The stack size is hard-coded to 32 kB (8000H) in two places. Ke...
- Wed Apr 14, 2021 11:16 am
- Forum: Astrobe for FPGA RISC5
- Topic: Creating Boot Files for EO with Astrobe for RISC5
- Replies: 1
- Views: 15923
Creating Boot Files for EO with Astrobe for RISC5
The following applies to Embedded Oberon, running on an FPGA board, using an SD card for storage. To venture into making changes to the inner core of the Embedded Oberon (EO) system, that is, modifying modules Files, FileDir, Modules, or Kernel, it's necessary to create a new boot file to reflect th...
- Wed Apr 14, 2021 12:51 am
- Forum: Astrobe for FPGA RISC5
- Topic: Tools for backing up a Project Oberon SD card image
- Replies: 1
- Views: 14741
Re: Tools for backing up a Project Oberon SD card image
I also use Win32 Disk Imager and the 'dd' command line tool. Here's my backup approach. I use Disk Imager to initially create an SD card to boot Embedded Oberon, using the disk image as downloaded from the Astrobe website, eg. 'Embedded200812.img'. Thereafter, I have an SD card with a 256 MB FAT par...
- Sat Apr 10, 2021 2:26 am
- Forum: Astrobe for FPGA RISC5
- Topic: Why are the SPI MISO and SCLK signals shorted together?
- Replies: 2
- Views: 16860
Re: Why are the SPI MISO and SCLK signals shorted together?
I think we should differentiate between the SPI device itself, and SPI-connected devices, for lack of a better term. The SPI device is implemented in the FPGA, the SPI-connected devices are, well, connected to this SPI device. The SD card is an SPI-connected device, as is the RTC if installed. Using...
- Mon Jan 20, 2020 6:46 am
- Forum: Astrobe for ARM Cortex-M0, M3, M4 and M7
- Topic: Configuring Buffer Sizes
- Replies: 2
- Views: 24404
Re: Configuring Buffer Sizes
You are right, I had come to the same conclusion. To actually see what the type complexity entails, down to the interrupt handler and so on, I implemented the module, and it results in roughly doubling the code size: about 4k for the "complex" version, about 2k for a version along the lines you sugg...
- Sat Jan 18, 2020 1:48 pm
- Forum: Astrobe for ARM Cortex-M0, M3, M4 and M7
- Topic: Configuring Buffer Sizes
- Replies: 2
- Views: 24404
Configuring Buffer Sizes
I am struggling with an seemingly straightforward problem. I am re-implementing my channels for input and output. Channels are abstractions of actual devices, such as serials. For a buffered implementation I need, well, buffers. I would like to have different buffer sizes for the different serials i...
- Sat Dec 28, 2019 4:54 am
- Forum: Astrobe for ARM Cortex-M0, M3, M4 and M7
- Topic: push {}
- Replies: 20
- Views: 93297
Re: push {}
FWIW, I enable the handlers from my Exceptions.Init, which corresponds to your Traps.Init, both called from Main.mod, ie. right before the application code starts. At this point, I can simply write to SCB_SHCSR. CONST SCB_SHCSR = MCU.NVICBase + 0D24H; MEMFAULTENA = 16; BUSFAULTENA = 17; USGFAULTENA ...
- Fri Dec 27, 2019 12:11 pm
- Forum: Astrobe for ARM Cortex-M0, M3, M4 and M7
- Topic: push {}
- Replies: 20
- Views: 93297
Re: push {}
Thanks! Which reminds me of a question I had meant to ask for some time: Traps.mod has handlers for faults such as mem fault or bus fault, but I cannot find the location where the corresponding system handlers get enabled (register SCB_SHCSR, defaults to handlers disabled). Is this by design, or do ...
- Fri Dec 27, 2019 10:38 am
- Forum: Astrobe for ARM Cortex-M0, M3, M4 and M7
- Topic: push {}
- Replies: 20
- Views: 93297
Re: push {}
In the code snippet, is id.addr still set to the same value as with the current Astrobe version, ie. the return address as pushed by the processor upon exception entry? And does the compiler/linker still write the source code line number as four byte value at the address right after the svc instruct...
- Thu Dec 26, 2019 11:49 am
- Forum: Astrobe for ARM Cortex-M0, M3, M4 and M7
- Topic: push {}
- Replies: 20
- Views: 93297
Re: push {}
The stack trace code I had described here does not work with leaf procedures. The procedure calling the leaf procedure is not detected as the leaf procedure does not create its own stack frame. I have yet been unable to come up with a solution as I fail to find a reliable method to detect a leaf pro...